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IP / SOC Products News

• Dolphin Integration breaks the 80251 speed records with 16-bit Tornado (Friday Aug. 24, 2012)
  The Flip80251 Tornado is accelerated 67 times from the i80C51 and by 5.3 times from the i80C251, running the Dhrystone V2.1 / 10,000 loops.
  
  
• Digital Core Design announces new version of its on Chip Debugger (Thursday Aug. 23, 2012)
  Digital Core Design introduced the newest version of DoCD. It is a complete debugging system, which consist of three main blocks: Debug IP Core, Hardware Assisted Debugger (HAD2) and Debugging Software.
  
  
• TSMC Unveils Foundry's First 100MHz Access Speed Embedded Flash IP (Friday Aug. 17, 2012)
  TSMC today unveiled the foundry segment’s first 100MHz flash memory single-cycle access speed 90nm embedded flash IP targeting a wide range of automotive, communications and industrial microcontroller (MCU) products.
  
  
• Evatronix NAND Flash Controller now available with SafeFTL from HCC Embedded (Thursday Aug. 16, 2012)
  Evatronix together with HCC Embedded, one of the leading experts in deployment of platform software, announced today availability of its fail-safe Flash Translation Layer, SafeFTL software optimized specifically for the Evatronix NAND Flash controller IP
  
  
• Creonic Announces DVB-RCS2 Turbo Decoder IP Core (Tuesday Aug. 14, 2012)
  Creonic today announced the availability of the world's first high-efficiency turbo decoder IP core for DVB-RCS2 for the fourth quarter of 2012. After DVB-RCS, DVB-RCS2 is the second generation DVB standard for interactive satellite systems.
  
  
• Xelic Announces 40G I.4/I.7 EFEC Core (Monday Aug. 13, 2012)
  Xelic announces the availability of their XCO23EFEC47 core. This core provides 40G or 4 x 10G Enhanced Forward Error Correction (EFEC) capability that is compatible with ITU-T G.975.1 Appendix I.4 and I.7 and is interoperable with other industry standard EFEC implementations.
  
  
• Novocell Semiconductor Announces Completion of Mil-Spec and Automotive Qualifications and Rad-Hard Tolerance for Embedded Non-Volatile Memory (Friday Aug. 10, 2012)
  Novocell Semiconductor has responded to the demands of their growing number of military, aerospace, and automotive industry customers, announcing today that their Smartbit™-based antifuse OTP memory designs have completed the rigorous exposure to long term high temperature exposure required for Military and Automotive applications, as well as survived extended exposure to radioactive Cobalt-60 necessary to establishing Rad-Hard (radiation hardened) status.
  
  
• Vivante Shipping GPU Cores Designed to Support the Latest OpenGL ES 3.0 Specification (Thursday Aug. 09, 2012)
  Vivante announces another technology breakthrough – first GPU IP to pass OpenCL 1.1 Conformance (CTS) and now, first GPU IP vendor to ship products designed for OpenGL ES 3.0
  
  
• DMP SMAPH-S Products to Support OpenGL ES 3.0 API Standard (Tuesday Aug. 07, 2012)
  DMP today announced new milestone in its scalable SMAPH-S shader based Graphics IP Core product family that now supports the latest OpenGL ES 3.0 API standard released by the Khronos™ Group.
  
  
• Kilopass Expands XPM Non-Volatile Memory IP Enablement On Two 180nm Dongbu HiTek BCD Process to Serve Increased Customer Demand (Monday Aug. 06, 2012)
  Kilopass announced today that it has successfully expanded enablement of its XPM (eXtra Permanent Memory) NVM IP on the Dongbu HiTek AN180 and BD180 BCD (Bipolar-CMOS-DMOS) processes.
  
  
• ARM Launches Second Generation of MALI-T600 Graphics Processors Driving Improved User Experience for Tablets, Smartphones and Smart-TVs (Monday Aug. 06, 2012)
  ARM today announced the second generation of the ARM® Mali™-T600 Series GPUs. Each of the products features a 50% performance increase and are the first to include Adaptive Scalable Texture Compression (ASTC), a texture compression technique that originated from ARM.
  
  
• MOSAID Demonstrates Single-Controller, Terabyte-Class Solid State Drive (Tuesday Jul. 31, 2012)
  MOSAID Technologies Inc. today introduced HLSSD(tm) (HyperLink Solid State Drive), a SSD that achieves Terabyte-class storage capacity using a single controller device. MOSAID engaged PaxDisk of Korea to develop the Terabyte-class HLSSD.
  
  
• Arasan Chip Systems Releases Universal Flash Storage (UFS) 1.1 IP (Friday Jul. 27, 2012)
  Arasan announced today, support for the new UFS 1.1 standard in their UFS Host Controller IP, UFS Device Controller IP, M-PHY® 2.0 for UFS and Hardware Validation Platforms.
  
  
• Digital Core Design announces 10/100 Mb Media Access Controller with RMII (Thursday Jul. 26, 2012)
  Digital Core Design has introduced the newest hardware implementation of a media access control protocol, defined by the IEEE standard. The DMAC-RMII, in cooperation with an external PHY device, enables network functionality in design. This IP Core supports 10BASE-T and 100BASE-TX/FX IEEE 802.3-2002 compliant RMII PHYs.
  
  
• Intilop's 76-nanosecond Nano-TOE system establishes a record 93% TCP/IP bandwidth measured at a major customer's 10G Network deployment (Thursday Jul. 26, 2012)
  Intilop extends their leadership in Hyper Accelerated TCP/IP processing hardware by delivering another record breaking 'TCP performance' in a full system deployed in a real network!
  
  
• eMemory's Embedded MTP Solution Passes Verification in 65nm Process Node (Tuesday Jul. 24, 2012)
  eMemory announced today that its embedded Multiple Times Programmable (MTP) memory silicon IP, NeoEE, has already passed electrical verification on a global leading wafer fab’s 65nm process platform, and is expected to complete reliability verification by the end of 2012.
  
  
• ARM and TSMC Collaborate to Optimize Next-Generation 64-bit ARM Processors for FinFET Process Technology (Monday Jul. 23, 2012)
  TSMC and ARM today announced a multi-year agreement extending their collaboration beyond 20-nm technology to deliver ARM processors on FinFET transistors, enabling the fabless industry to extend its market leadership in application processors.
  
  
• Arasan Chip Systems Announces support of new JEDEC standard; eMMC 4.51 (Friday Jul. 20, 2012)
  asan announced today the support of the new standard eMMC 4.51 in their SD4.0/SDIO4.0/eMMC4.51 and SD3.0/SDIO3.0/eMMC4.51 Host Controller IP.
  
  
• Systemcom Ltd launches new Current Input Analog Front-End with 13-bit ADC at TSMC 180nm (Friday Jul. 13, 2012)
  Systemcom Ltd announces an expansion of its immediately available IP module and ASIC/ASSP product line. The latest Analog Front End for current measurement with 13-bit ADC is ready to be embedded into SoC with sensors/MEMS at its input.
  
  
• Xylon now shipping upgraded logiCAN CAN2.0B Bus Controller IP Core (Friday Jul. 13, 2012)
  Xylon has upgraded the logiCAN CAN2.0B Compatible Network Controller with new features. The logiCAN IP core now has ARM® AXI4-Lite bus interface which allows easy implementation on the latest Xilinx FPGA families, including the 7 series Artix®-7, Kintex®-7 and Virtex®-7 devices.
  
  
• Logic design optimization takes a quantum leap with Dolphin Integration's standard cell library enriched with pulsed latches (Friday Jul. 13, 2012)
  Dolphin Integration announces a breakthrough solution enriching SESAME 6-track library, which can be used for helping logic designers reach 10% to 20% density gains on any logic design from 180 nm down to 40 nm.
  
  
• Altera Reduces Design Complexity in High-Performance 40GbE/100GbE Designs with Latest IP Core Offering (Tuesday Jul. 10, 2012)
  Altera today announced the production availability of its 40-Gbps Ethernet (40GbE) and 100-Gbps Ethernet (100GbE) intellectual property (IP) cores. The media access control (MAC) and physical coding sublayer plus physical media attachment (PCS+PMA) sublayer IP cores are IEEE 802.3ba™-2010 standard compliant, reducing design complexity for customers integrating 40GbE and 100GbE connections on Altera’s 28-nm Stratix® V FPGAs and 40-nm Stratix IV FPGAs.
  
  
• Cosmic Circuits' announces the silicon availability of MIPI M-PHY in 28nm (Tuesday Jul. 10, 2012)
  Cosmic Circuits today announced the silicon availability of its MIPI M-PHY solution in 28nm. Cosmic Circuits M-PHY solution supports both the HS-G1 (1.5Gbps) and HS-G2 (3Gbps) modes. The silicon has been characterized across supply, temperature and process corners and detailed characterization reports will be available very soon.
  
  
• Synopsys and SMIC Announce DesignWare IP for 40-nm Low-Leakage Process (Tuesday Jul. 10, 2012)
  Synopsys and SMIC today announced the availability of a broad set of Synopsys DesignWare IP on the SMIC 40-nm low-leakage (40LL) process.
  
  
• Xylon announces logiI2C Master Controller IP core for Xilinx FPGAs (Monday Jul. 09, 2012)
  New logiI2C Bus Master Controller IP core from Xylon's logicBRICKS IP library supports single master I2C communications and enables bug-free data transfers. It is ARM® AMBA® AXI4-Lite bus compliant, and can be implemented in all Xilinx programmable devices, including the 7 series FPGA families and the Zynq™-7000 EPP.
  
  
• Synopsys' DesignWare IP for PCI Express with Support for Low-Power Sub-States Successfully Taped Out in Multiple Designs (Monday Jul. 09, 2012)
  Synopsys today announced that its industry-first PCI Express controller IP with support for low-power sub-states has successfully taped out in multiple designs. The addition of the L1.1 ("snooze") and L1.2 ("off") sub-states to Synopsys' DesignWare® controller IP for PCI Express 1.0, 2.0 and 3.0 enables designers to reduce power consumption in key market segments, including camera, card reader, networking and wireless applications serving the ultrabook and tablet markets.
  
  
• Dolphin Integration empowers the Smart Metering market with a dense and low BoM panoply for class 0.1 reaching 1:10,000 systems (Friday Jul. 06, 2012)
  Dolphin Integration offers an Analog Front-End for Power-metering reaching 20 bits of sensitivity. This AFE at 180 nm enables to satisfy the needs of a system targeting the highest performances: up to a class of 0.1 over a range of 1/10,000. The user thus benefits from a high precision measurement for either accurate billing, or wise device power management.
  
  
• Novocell Semiconductor announces the expansion of the firm's one-time programmable non-volatile memory IP product line (Friday Jul. 06, 2012)
  Novocell Semiconductor has announced an expansion of their immediately available IP product line. Novocell’s single original NovoBlox® product has been divided and expanded to include three new product families that now encompass Novobits™, NovoBytes™, and NovoHD™, each tailored to meet the needs of specific market applications.
  
  
• Dolphin Integration's breakthrough offering to spread Audio Codecs over AP and PMIC (Monday Jul. 02, 2012)
  Splitting efficiently an Audio Codec, into its Analog Front-end (AFE) and its logic filters, requires a wise interface and Dolphin's proprietary Bow interface makes the difference.
  
  
• Sital Shows Significant Improvement of Noise Immunity on its 1553 IP Core (Monday Jul. 02, 2012)
  As part of a customer's system, Sitals 1553 IP have recently passed all the RT validation tests at Test Systems Inc. During the test, an issue was raised regarding the noise immunity of the system under test.