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IP / SOC Products News

• Digital Core Design introduces the newest version of the Motorola's 68000 16/32-bit microprocessor with Linux, MAC & debugger (Thursday Jun. 28, 2012)
  Digital Core Design have introduced the newest version of the Motorola’s 68000 16/32-bit microprocessor. D68000 is the industry’s low cost 32-bit MCU, offering not only a low cost entry point but also effective performance. Improved architecture enables this IP Core to run with uCLinux, so it can be easily used as HTTP server or FTP client.
  
  
• Integre Technologies Announces HyperLink DSP Interface FPGA Core (Wednesday Jun. 27, 2012)
  Integretek core leverages proven Texas Instruments' HyperLink technology connecting FPGA designs to TI’s TMS320C66x multicore processors
  
  
• GUC Announces 10GBase-KR, Multi-Standard SerDes IP (Tuesday Jun. 26, 2012)
  Global Unichip today announced the availability of its second generation silicon-proven 10GBase-KR Multi-Standard SerDes IP (MSKR SerDes). Designed in TSMC’s 40nm CMOS technology, GUC’s MSKR SerDes IP has achieved industry leading jitter generation (< 400fs) and jitter tolerance (> 0.75UI) performance.
  
  
• SMIC and AlgolTek Announce the Availability of digniPHY for USB 3.0 on SMIC's 0.13um Technology (Tuesday Jun. 19, 2012)
  SMIC and AlgolTek today announced the availability of digniPHY for USB 3.0 on SMIC's 0.13-micron process technology. AlgolTek's digniPHY for USB 3.0 is a Physical Layer IP compliant with the USB 3.0 specification, and is backward compatible to support 3rd party or customers' proprietary USB 2.0 IP that is USB 2.0 specification compliant.
  
  
• New ARM Mali-450 MP Graphics Processor Provides Next-generation Graphics Performance for Smart-TV and Smartphone Applications (Monday Jun. 18, 2012)
  ARM has announced the launch of the ARM® Mali™-450 MP Graphics Processing Unit (GPU), doubling the performance of the successful family of Utgard architecture-based graphics products. This includes the Mali-400 MP GPU that can currently be found in a wide range of mainstream products, including smart-TVs, as well as Android™-based smartphones and tablets.
  
  
• Xilinx Targets Reduced OpEx and CapEx for Network Operators with Expanded FEC IP Core Offering (Monday Jun. 18, 2012)
  Xilinx, Inc. today announced its expanded Forward Error Correction (FEC) Intellectual Property (IP) Core offering at the WDM and Next Generation Optical Networking 2012 Conference being held in the Grimaldi Forum, Monaco.
  
  
• Dolphin Integration sRAM compiler completes TSMC IP9000 Level 1 qualification at 85 nm Ultra Low Power process (Friday Jun. 15, 2012)
  Dolphin Integration announces that the new memory architecture RHEA has now passed the Level 1 criteria of TSMC’s stringent IP9000 qualification program.
  
  
• Imagination achieves Wi-Fi CERTIFIED Wi-Fi Direct certification for its Ensigma IP (Friday Jun. 15, 2012)
  Imagination Technologies has achieved Wi-Fi Direct™ certification for its Ensigma UCCP IP Reference Platform. Wi-Fi Direct is a certification mark for devices supporting a technology that enables Wi-Fi® devices to connect directly, making it simple to do things like print, share, synch and play without joining a traditional home, office or hotspot network.
  
  
• Imagination announces new generation PowerVR D4500MP video decoder and E4500MP video encoder (Friday Jun. 15, 2012)
  Imagination Technologies has announced the first members of its PowerVR Series4 video cores. The PowerVR Series4 D4500MP video decoder and E4500MP video encoder build on the highly successful PowerVR VXD and VXE Series3 multistandard video codecs.
  
  
• Imagination adds to PowerVR Series6 'Rogue' family (Friday Jun. 15, 2012)
  Imagination Technologies, a leading multimedia technologies company, announces the latest IP cores in its ground-breaking PowerVR Series6 GPU core family. The PowerVR G6230 and G6430 GPU IP cores are the latest in a growing family of PowerVR Series6 GPU cores and deliver high compute efficiency while minimising power and bandwidth requirements.
  
  
• Dolphin Integration announces a break-through in logic design drastically improving performances (Wednesday Jun. 13, 2012)
  Dolphin Integration, the leader in virtual components of logic and mixed signal IP for high-performance and power-optimized subsystems, will release LogiWare™, the latest innovation for standard cell libraries at TSMC Symposium, in Amsterdam, on June 19, 2012.
  
  
• Intilop's 76-nanosecond full TCP Offload (TOE) establishes yet another System Latency record with Altera Stratix-V FPGA board from BittWare (Wednesday Jun. 13, 2012)
  Intilop today announced delivery of a full FPGA based System Platform powered by their new Ultra Low latency 4th Gen 10G Nano TOE and Ultra Low latency Media Access controller. It integrates Ultra-Low Latency PHY available in Altera Stratix-V FPGAs. Full System Platform is on an Altera Stratix-V FPGA board from BittWare.
  
  
• Posedge standardizes on EnSilica's eSi-3250 processor for wired/wireless networking IP solutions (Tuesday Jun. 05, 2012)
  EnSilica has announced that Posedge has standardized on its eSi-3250 32-bit processor core for the processing engine architecture for its range of wired/wireless networking IP solutions.
  
  
• DMP Delivers New Platform IP Offering for Optimized SoC Integration with Graphics and Media Cores (Tuesday Jun. 05, 2012)
  DMP Platform IP offering enables performance optimization and low power implementation based on DMP’s decade long GPU and SoC design experiences in the areas of priority control and bandwidth sharing between CPU and GPU plus the performance optimization of DDR DRAM I/F for CPU and GPU applications.
  
  
• Intrinsic-ID Launches Quiddikey-FLEX: Flexible Key Management IP Core (Monday Jun. 04, 2012)
  Intrinsic-ID announces the immediate availability of its Quiddikey®-FLEX IP core. With Quiddikey®-FLEX the secret key programming can be done by users and/or apps in the after-market (e.g. after a handset or tablet is already in the field). No personalization phase in a secure environment is required, nor an involvement from the chip or module manufacturer.
  
  
• JPEG Encoder IP Core from CAST gets Rate Control Options, Faster FPGAs (Monday Jun. 04, 2012)
  CAST, Inc. today announced functional and performance improvements for the JPEG Encoder IP core it provides. The JPEG Encoder core now runs on the latest Altera® and Xilinx® FPGAs, at up to 400 MSamples/sec. This means a single encoder core can process 1080p@60fps video on low-cost Altera Cyclone-V and Xilinx Artix™-7 devices, or Digital Cinema 4k@30fps on higher-end devices like Altera Stratix® V and Xilinx Virtex®-7 FPGAs.
  
  
• Open-Silicon Announces Industry's First Hybrid Memory Cube Controller IP (Monday Jun. 04, 2012)
  Open-Silicon announced today the industry's first Hybrid Memory Cube (HMC) controller IP core - the industry's highest-performance and most flexible solution for integrating the many benefits of HMC technology into next-generation systems.
  
  
• PLDA Announces Live PCI Express Gen3 x8 Demo Running on Xilinx Kintex-7 FPGA (Friday Jun. 01, 2012)
  PLDA today announced it will be debuting a live PCIe(R) x8 Gen3 demo featuring PLDA's leading PCIe Gen3 soft IP core and running on a Xilinx Kintex-7 FPGA during the DAC Conference
  
  
• APS5 32 bit Microcontroller IP Core for High Performance Embedded ASIC Designs Launched by Cortus (Thursday May. 31, 2012)
  Cortus extends its family of 32 bit modern RISC microcontroller IP cores with the high performance APS5. The APS5 is aimed at more complex embedded systems on chip requiring caches and/or co-processors and is capable of multi-processor configuration.
  
  
• Analog Bits Unveils Integrated Sensor Macro Family (Thursday May. 31, 2012)
  Analog Bits, the Integrated Clocking and Interface IP leader, today announced the immediate availability of a fully integrated Sensor macro product line to monitor both on-chip temperature variation and voltage supply.
  
  
• 8051 Microcontroller IP Cores from CAST Even More Efficient with New Single-Wire Debug (Wednesday May. 30, 2012)
  CAST, Inc. now offers a debugging solution for 8051 IP cores that requires a single connection instead of the four needed for traditional JTAG debug. The new Single-Wire On-chip Rapid Debugging (SWORD™) interface for the R8051XC2™ microcontroller core connects the 8051 to its debugging unit with just one IC debug port.
  
  
• Vivante Leads Mobile GPGPU Revolution Becoming First GPU IP Supplier to Pass OpenCL(TM) 1.1 Conformance Test (Tuesday May. 29, 2012)
  Vivante today announced Vivante GC Cores passed the Khronos(TM) Group OpenCL 1.1 Embedded Profile (EP) conformance test suite on Freescale's i.MX 6 platform. The GC Cores use the latest programmable ScalarMorphic(TM) architecture to accelerate parallel data workloads on thousands of concurrent threads to achieve Gigaflops (GFLOPS) of computational performance.
  
  
• Cadence Announces Updated Design and Verification IP for DDR PHY Interface (Tuesday May. 29, 2012)
  Cadence today announced that the company's comprehensive suite of DDR controller and DDR PHY design IP as well as its Cadence Verification IP Catalog now support the latest release of the DFI specification, version 3.1 (also announced today by the DFI Group).
  
  
• Silicon Image Introduces Low Power Dual-Mode Transmitter IP Core Supporting Both HDMI and MHL Connectivity Standards (Wednesday May. 23, 2012)
  Silicon Image today announced the availability of a low power dual-mode transmitter intellectual property (IP) core that supports both the HDMI ® (High-Definition Multimedia Interface) 1.4b and MHL™ (Mobile High-Definition Link) 2.0 standards.
  
  
• Cortus Launches APS3R 32 bit Microcontroller IP Core for Low Energy Embedded Applications (Tuesday May. 22, 2012)
  Cortus extends its family of 32 bit modern RISC microcontroller IP cores with the energy efficient APS3R. The APS3R is aimed at low power embedded applications such as wireless sensor networks, touchscreen controllers, smart cards and systems using energy harvesting.
  
  
• Posedge and PerfectVIPs Partner to Provide Complete ONFi IP/VIP Solution (Monday May. 21, 2012)
  In a clear move to ensure storage and memory designers a best-in-class solution to ASIC development, Posedge and PerfectVIPs have combined their respective strengths to give designers the best Open NAND Flash Interface (ONFi) IP solution and ONFi verification solution on the market. The partnership provides a means for customers to obtain a PerfectVIPs ONFi VIP evaluation packaged with the Posedge ONFi IP.
  
  
• PLDA Introduces High-performance Linux and Windows PCI Express Device Drivers Optimized for Latency-sensitive Applications (Wednesday May. 16, 2012)
  PLDA today announced the 3rd generation Linux and Windows device driver for its PCI Express IP cores and FPGA design kits. Redesigned from the ground up with an architecture optimized for latency, the device drivers support Linux 32-bit and 64-bit distributions as well as Windows XP, Windows 7 32-bit and Windows 7 64-bit and provide a common API, allowing seamless switching between both Linux and Windows operating systems.
  
  
• Kilopass NVM IP Cores First to Deliver Footprint and Pin Compatibility Across Eight Top-Tier Silicon Foundries for the 130/110nm Process Node (Tuesday May. 15, 2012)
  Kilopass’ NVM IP common implementation for the eight top-tier silicon foundries at the 130/110nm process node means designers can use the same interface and achieve the same area at all of the eight foundries at the 130/110nm, thus making foundry mobility far simpler than before.
  
  
• Cadence Introduces New NVM Express IP Solutions for Solid State Storage Applications (Tuesday May. 15, 2012)
  Cadence today launched the industry’s first IP subsystem for the development of SoCs supporting the NVM Express 1.0c standard, an interface technology used in the rapidly growing solid-state drive (SSD) market. The solution includes Cadence Design IP for NVM Express controller and Cadence Design IP for NVM Express subsystem.
  
  
• Intilop delivers Nano-TOE IP Core with another record breaking Ultra-Low latency of 76 nanoseconds & 20 G bit bandwidth for high performance networking applications (Friday May. 11, 2012)
  Intilop today announced the release of their new Ultra-Low latency 4th Gen 10G Nano-TOE. This product announcement extends their leadership of more than 3 years in providing Ultra-Low-Latency Full TCP Offload technology and solutions. Their mature, network proven, and real-time deployed series of TOE's have been implemented in hundreds of networks worldwide.