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Commentary / Analysis

• ESC video special: Xilinx talks programmable logic (Thursday Apr. 05, 2007)
  Executives from programmable logic specialist Xilinx Inc. spoke with EE Times editor-in-chief Brian Fuller during the Embedded Systems Conference Silicon Valley here.
  
  
• Exec Q&A: TI's DSP, ASIC chief (Monday Apr. 02, 2007)
  Texas Instruments Inc. recently celebrated the 25th anniversary of the digital signal processor (DSP). To gain an insight on the past, present and future of DSPs, EE Times caught up with Michael Hames, senior vice president and manager of application specific products at TI (Dallas).
  
  
• EETimes Blog: ST picks up Chinese processor (Thursday Mar. 29, 2007)
  Some very interesting news out of STMicroelectronics. They are teaming up with the Chinese Academy of Sciences to develop and commercialize 64-bit processors based on Loongson-2E intellectual property. I first blogged this back in January and both parties played dumb, saying they didn't know anything about it.
  
  
• The death of ASICs is greatly exaggerated (Thursday Mar. 29, 2007)
  This week market research firm iSuppli reported that ASIC/ASSP design starts are continuing to plummet. According to the firm, there will be only 5,000 design starts this year, a 50% decrease from the levels seen in the mid-90's. Rival research firm Gartner has even grimmer number, projecting that there will be only 3,200 design starts this year.
  
  
• The Controversy Over GPL 3 (Thursday Mar. 22, 2007)
  A new version of the GPL, the third overall and the first revision since 1991, was supposed to be released this month. But controversy over several new provisions--and the authors' ambitions to thwart Microsoft's Linux pact with Novell--have delayed it until later this year.
  
  
• Rockwell seeks 50 percent design cycle reduction (Thursday Mar. 15, 2007)
  Avionics electronics firm Rockwell Collins has initiated a five-year effort to cut its engineering cycle time by 50 percent, according to Linda Snow-Solum, senior director of enterprise infrastructure management at that company. In a presentation Wednesday (March 14), she outlined Rockwell's drive to integrate tools and processes at the enterprise level.
  
  
• Programmable processors: Make them for all, or one? (Monday Mar. 12, 2007)
  These days, there are so many startups developing programmable processors that it feels like we're back in the bubble years, when anyone with a remotely viable processor design could secure venture funding. A pivotal question for the current crop of startups is whether to offer their processors as flexible, general-purpose chips or as highly specialized, application-specific solutions. Should their product be a jack-of-all-trades or a master of one?
  
  
• What next for symmetric multiprocessing on SoC? (Thursday Mar. 08, 2007)
  Despite moves by Intel Corp. and Advanced Micro Devices Inc. to bring their dual and four-core processors into embedded applications, there is a sense that some of the companies that pioneered symmetric multiprocessing in the system-on-chip (SoC) world are finding it harder to make progress.
  
  
• ARM tips plans for next-generation processor (Tuesday Mar. 06, 2007)
  ARM Holdings plc, the licensor of processors and related intellectual property, has tipped sparse details of plans for a next-generation processor a follow on to the three processor cores the comprise the Cortex series.
  
  
• Faster verification is the goal at ST (Monday Mar. 05, 2007)
  Laurent Ducousso, who manages intellectual-property (IP) verification for STMicroelectronics' Home Entertainment Division, recently talked to EE Times editor Richard Goering about ST's verification approach.
  
  
• TI talks about IC production strategy (Tuesday Feb. 20, 2007)
  Texas Instruments Inc. here elaborated on its IC-manufacturing strategy, saying that it will shortly announce a new strategic deal with a silicon foundry provider. TI did not identify the provider, but some sources speculated that the chip maker could form a closer partnership with Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC).
  
  
• Mixed-signal chip firm sees more mergers (Monday Feb. 19, 2007)
  Joao Vital, co-founder and general manager of Chipidea’s data converter business unit told EW that further acquisitions were likely as the IP firm tried to grow its business faster than was currently possible by organic sales increases.
  
  
• Video special: Interview with TSMC Chairman Morris Chang (Thursday Feb. 15, 2007)
  Industry legend Morris Chang, an architect of the semiconductor foundry business, sat down here this week with EE Times editor-in-chief Brian Fuller to discuss where the chip industry has been and where it is headed.
  
  
• Rambus Ruling To Fuel Reforms (Monday Feb. 12, 2007)
  A federal regulator's decision in an antitrust case against Rambus Inc. sends an unambiguous message to the semiconductor industry about the need to disclose patents in industry standards deliberations, legal experts said.
  
  
• Tough Times Prompt Murmurs That Transmeta Might Be On Block (Monday Feb. 12, 2007)
  When high-profile startup Transmeta Corp. launched its X86-based microprocessor line, Crusoe, in 2000, the company received a ton of media coverage, even from CNN. But now, like Daniel Defoe's Robinson Crusoe, Transmeta is stuck on a deserted island, a shadow of its former self.
  
  
• India needs to develop IPs to move up design chain, says Tensilica exec (Friday Feb. 09, 2007)
  If an Indian company wants to get involved with the intellectual property (IP) business, then there are models to make that successful, said Daniel Weed, Tensilica's senior vice president for customer engineering, during his speech at the recent ISA Vision Summit 2007 in Hyderabad.
  
  
• CEO confirms ''at least three'' ARM processors in iPhone (Wednesday Feb. 07, 2007)
  Warren East, president and chief executive officer of ARM Holdings plc, has confirmed that "at least three" processor cores developed at his company are present within the iPhone from Apple Inc.
  
  
• Commentary: Models hold value, not IP (Monday Jan. 29, 2007)
  While the intrinsic value of intellectual property (IP) is rooted in its functionality, it is the model that holds all practical value. Likewise, it is the model that generates most of the expense. The cost to develop, verify, maintain and support IP models is equal to that of designing an application specific integrated circuit (ASIC).
  
  
• ST, ARM challenged by TI strategic shift, says analyst (Wednesday Jan. 24, 2007)
  The decision by Texas Instruments Inc. to end leading-edge process development at the 45-nm manufacturing node and rely on foundries thereafter, is set to have important implications for European electronics firms, according to Didier Scemama, an analyst with ABN-Amro Bank, in a note distributed to clients.
  
  
• Fabless firms grabbed 20% of IC revenue in '06 (Thursday Jan. 18, 2007)
  Fabless IC suppliers secured 20 percent of worldwide IC sales in 2006, more than twice the total fabless revenue share they had in 2000, according to a report released by market research analyst IC Insights Wednesday (Jan. 17).
  
  
• How many ARM cores does it take to make an iPhone? (Friday Jan. 12, 2007)
  There has been much speculation about whose chips are designed into the Apple iPhone, the mobile gadget launched by Apple this week. But it should be remembered that modern system design is also about the cores inside the chips.
  
  
• Commentary: ESL success demands outsourcing (Monday Jan. 08, 2007)
  In 2007, the intellectual property (IP) and EDA industry businesses that have invested in ESL need to take a hard and practical look at themselves. Theoretically, it is obvious how system-level design can improve product quality and time to market by enabling fast simulation platforms and early design exploration. Practically, it is a much different story.
  
  
• Multicore faces a long road (Thursday Dec. 28, 2006)
  Next year promises some stepwise advances, including the advent of the first multicore benchmarks and applications programming interfaces. But in time it may also be remembered as the year the industry realized what designers of multicore software and interconnects already know: Many years of hard work lie ahead.
  
  
• Analyst Gary Smith: top 10 EDA topics for 2007 (Thursday Dec. 28, 2006)
  Veteran EDA analyst Gary Smith, founder and chief analyst of Gary Smith EDA, has provided a top ten list of hot topics for electronic design in 2007
  
  
• Fabless Semiconductor companies: is intellectual property reuse creating a new model? (Wednesday Dec. 20, 2006)
  Over the last few months several people have suggested that a new business model is emerging for fabless semiconductor companies
  
  
• Q&A: Denali's Srivastava bridges EDA, IP domains (Friday Dec. 15, 2006)
  Sanjay Srivastava, president and CEO of Denali Software Inc., has led the company since its inception over 10 years ago. Srivastava answered some questions about Denali, IP, and EDA in the following interview.
  
  
• How Real is the Intellectual Property Revolution? (Friday Dec. 08, 2006)
  Electronic News sat down to discuss the ins and outs of intellectual property with Juan-Antonio Carballo, partner in IBM’s Venture Capital Group; Michael Farn, a partner at law firm Fenwick & West; Martin Harding, CEO of Tenison, and Jim Turley, consultant and publisher of Silicon Insider. What follows are excerpts of that discussion.
  
  
• Rambus CEO: Consumer arena now drives IC demand (Thursday Dec. 07, 2006)
  Consumer electronics now drives chip demand, Rambus Inc.'s top executive says, and it's proving to be the most demanding customer of all
  
  
• Commentary: Lower test costs start with IC design (Thursday Nov. 23, 2006)
  What do cost of test and weather have in common? To paraphrase Mark Twain, it seems like everybody talks about it, but nobody does anything about it. We can't do much about the weather but we can do something about test costs
  
  
• Pressures tilt wireless apps toward System-in-Package (SiP) (Thursday Nov. 23, 2006)
  System-in-Package (SiP) technology has begun to challenge SoC implementations as a high-level design strategy for selected wireless applications because of lengthening SoC design cycles and other factors.