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FPGA / CPLD News
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Lattice Launches ispLeverCORE(tm) Connection IP Partners Program (Tuesday Sep. 02, 2003)
Lattice Launches ispLeverCORE(tm) Connection IP Partners Program
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Actel Qualifies Axcelerator Devices for Industrial Temperature Operation (Tuesday Sep. 02, 2003)
Actel Qualifies Axcelerator Devices for Industrial Temperature Operation
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Actel Unveils Industry's First Flash-Based FPGAs Qualified to Full Military Specifications (Monday Aug. 25, 2003)
Actel Unveils Industry's First Flash-Based FPGAs Qualified to Full Military Specifications
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SCHLEIFRING Deploys Lattice ORT82G5 FPSC in Next-Generation Computed Tomography Medical System (Monday Aug. 25, 2003)
SCHLEIFRING Deploys Lattice ORT82G5 FPSC in Next-Generation Computed Tomography Medical System
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Altera’s Stratix GX FPGA’s Embedded Dynamic Phase Alignment Simplifies Board Design with PMC-Sierra’s XENON Ethernet Devices (Monday Aug. 25, 2003)
Altera’s Stratix GX FPGA’s Embedded Dynamic Phase Alignment Simplifies Board Design with PMC-Sierra’s XENON Ethernet Devices
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Cypress MicroSystems Announces Low-Power, Programmable Mixed-Signal Array for Portable Control Applications (Tuesday Aug. 12, 2003)
Cypress MicroSystems Announces Low-Power, Programmable Mixed-Signal Array for Portable Control Applications
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Actel Enhances Libero Integrated Design Environment for its Successful ProASICPLUS FPGAs (Monday Aug. 04, 2003)
Actel Enhances Libero Integrated Design Environment for its Successful ProASICPLUS FPGAs
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Lattice Expands its Revolutionary ispXPLD Device Family with 1,024 and 256 Macrocell Members (Monday Aug. 04, 2003)
Lattice Expands its Revolutionary ispXPLD Device Family with 1,024 and 256 Macrocell Members
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Altera Introduces Nios Development Kit, Stratix Professional Edition (Monday Aug. 04, 2003)
Altera Introduces Nios Development Kit, Stratix Professional Edition
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Cypress and Xilinx Accelerate Deployment of Next-Generation Data Over Sonet/SDH Solutions For Metro Area Network Applications (Wednesday Jul. 30, 2003)
Cypress and Xilinx Accelerate Deployment of Next-Generation Data Over Sonet/SDH Solutions For Metro Area Network Applications
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Cypress to Provide Programmable Clock Generator Timing Solutions For Rambus XDR Memory Systems (Wednesday Jul. 23, 2003)
Cypress to Provide Programmable Clock Generator Timing Solutions For Rambus XDR Memory Systems
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Altera’s New Stratix DSP Development Kit Supports Texas Instruments’ Leading DSP Platforms (Wednesday Jul. 02, 2003)
Altera’s New Stratix DSP Development Kit Supports Texas Instruments’ Leading DSP Platforms
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Sony's Makimoto says FPGAs 'a must' in consumer electronics (Friday Jun. 27, 2003)
Sony's Makimoto says FPGAs 'a must' in consumer electronics
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Xilinx Spartan-3 FPGAs Lower in Cost Than FPGA-to-ASIC Conversions (Monday Jun. 23, 2003)
Xilinx Spartan-3 FPGAs Lower in Cost Than FPGA-to-ASIC Conversions
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Xilinx Delivers Millionth Virtex-II FPGA Into Customer Hands, Garnering Over 80% Market Segment Share* (Monday Jun. 23, 2003)
Xilinx Delivers Millionth Virtex-II FPGA Into Customer Hands, Garnering Over 80% Market Segment Share*
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Altera Targets Bigger Piece of ASIC Market with HardCopy Stratix Devices (Monday Jun. 23, 2003)
Altera Targets Bigger Piece of ASIC Market with HardCopy Stratix Devices
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New Stratix Edition PCI/PCI-X Development Kit Extends Altera’s PCI Development Leadership (Thursday Jun. 12, 2003)
New Stratix Edition PCI/PCI-X Development Kit Extends Altera’s PCI Development Leadership
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Xilinx Chips Selected For Latest 3G Wireless Test Platform From Agilent Technologies (Monday Jun. 09, 2003)
Xilinx Chips Selected For Latest 3G Wireless Test Platform From Agilent Technologies
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Actel Expands Web-Based Resource Center for ASIC and FPGA Design Engineers (Monday Jun. 09, 2003)
Actel Expands Web-Based Resource Center for ASIC and FPGA Design Engineers
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Souped-up FPGAs execute FFTs (Monday Jun. 02, 2003)
Souped-up FPGAs execute FFTs
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Altera Qualifies Cyclone, ACEX 1K, and MAX Devices for Extended Temperature Range (Tuesday May. 27, 2003)
Altera Qualifies Cyclone, ACEX 1K, and MAX Devices for Extended Temperature Range
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Actel's Space FPGAs Break 1-Million Gate Barrier (Monday May. 26, 2003)
Actel's Space FPGAs Break 1-Million Gate Barrier
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Altera FPGA Enables Industry's Highest Source-Synchronous Data Transfer Rate (Tuesday May. 20, 2003)
Altera FPGA Enables Industry's Highest Source-Synchronous Data Transfer Rate
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Altera Ships the Industry's First FPGA with 20 High-Speed Transceiver Channels (Tuesday May. 20, 2003)
Altera Ships the Industry's First FPGA with 20 High-Speed Transceiver Channels
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Actel Delivers Fully Qualified High-Speed, Low-Power Axcelerator Devices (Monday May. 12, 2003)
Actel Delivers Fully Qualified High-Speed, Low-Power Axcelerator Devices
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Xilinx Extends Virtex-II Pro™ Product Line With 10 Gbps Serial Transceivers (Tuesday May. 06, 2003)
Xilinx Extends Virtex-II Pro™ Product Line With 10 Gbps Serial Transceivers
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Xilinx Ships Interface Solutions For FPGA Industry's First 10 Gbps Physical Layer Transceiver Family (Tuesday May. 06, 2003)
Xilinx Ships Interface Solutions For FPGA Industry's First 10 Gbps Physical Layer Transceiver Family
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Lattice Expands Power Management Mixed-Signal PLD Family (Monday May. 05, 2003)
Lattice Expands Power Management Mixed-Signal PLD Family
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Altera's DSP Builder Now Supports FPGA Co-Processor Development for Accelerating DSP Systems (Wednesday Apr. 30, 2003)
Altera's DSP Builder Now Supports FPGA Co-Processor Development for Accelerating DSP Systems
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Xilinx Announces Industry's Lowest Cost Configuration Solution (Tuesday Apr. 29, 2003)
Xilinx Announces Industry's Lowest Cost Configuration Solution