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IP / SOC Products News

• Standard Cells reducing leakage 40 to 60 times at 90 and 65 nm from Dolphin Integration (Friday Mar. 04, 2011)
  The SESAME BIV (Battery Interface Voltage) library of Standard Cells with its Flip-Flop patented for Low Voltage operation, is the winners' choice to in-house libraries for low-power applications.
  
  
• Microsemi and ESCRYPT Partner to Deliver Cryptographic FPGA Solutions With Enhanced Security (Thursday Mar. 03, 2011)
  Microsemi and ESCRYPT GmbH today announced the immediate availability of several new cryptographic cores with enhanced resistance to differential power analysis (DPA).
  
  
• Alvand Technologies Announces Advanced Wireless MIMO Analog Front End Platform for LTE/WiMAX Application (Thursday Mar. 03, 2011)
  Alvand Technologies today announced the availability of silicon-proven wireless MIMO analog front-end for LTE/WiMAX, and Wi-Fi applications in 65nm.
  
  
• Synopsys DesignWare IP First to Support Final Release of PCI Express 3.0 Specification (Monday Feb. 28, 2011)
  Synopsys today announced that it is the first IP provider to support the final version of the PCI Express® (PCIe®) 3.0 base specification (version 1.0), recently released by the PCI Special Interest Group (PCI-SIG®).
  
  
• The first configuration of Dolphin Integration stars an audio converter at 40 nm LP to a high SNR of 100 dB (Friday Feb. 25, 2011)
  The new audio converter kit from Dolphin Integration is based on Helium2, the now celebrated ultra Low Power architecture. It includes blocks like ADC and DAC cores, DC regulators and a wealth of peripherals: line-input, microphone biasing, line-output, synchronization (SRC for Sample Rate Converter), filters, headphone True Ground
  
  
• Imec and Renesas Electronics Announce Development of an Innovative SAW-Less Reconfigurable Transceiver (Friday Feb. 25, 2011)
  At ISSCC2011, imec and Renesas Electronics present a highly-linear reconfigurable transceiver, eliminating the need of surface acoustic wave (SAW) filters.
  
  
• Barco Silex presents enhanced version of Public Key hardware solution (Thursday Feb. 24, 2011)
  Barco Silex has announced an enhanced version of its Public Key Hardware Accelerator. The BA414E is the first member of a new generation of Crypto Intellectual Property (IP) cores developed, validated and licensed by Barco Silex.
  
  
• DMAP and MoreThanIP Announce a strategic partnership on D0-254 Ethernet technology for safety-critical systems (Wednesday Feb. 23, 2011)
  DMAP and MoreThanIP today announced a strategic partnership to make available MoreThanIP’s intellectual property/cores with DO-254 certification package.
  
  
• Synopsys Announces Immediate Availability of Silicon-Proven DesignWare Data Converter IP in SMIC 65-nm LL Process Technology (Tuesday Feb. 22, 2011)
  Synopsys today announced the immediate availability of the silicon-proven DesignWare™ Data Converter IP for SMIC's popular 65-nanometer (nm) Low Leakage (LL) process technology, enabling designers to improve their chips' power efficiency and ease their integration efforts.
  
  
• Disruption in library offering for the 90 nm LP process with Dolphin Integration's new generation of High Density Standard Cells (Friday Feb. 18, 2011)
  The SESAME HD architecture of Standard Cells is the unexpected alternative to conventional 7 or 8-track libraries, for its cost and power reduction capabilities at major foundries in 90 nm LP process.
  
  
• Evatronix Enhances its USB Portfolio with High Speed Inter-Chip (HSIC) Compatible PHY IP (Tuesday Feb. 15, 2011)
  Evatronix have announced today the introduction of a High Speed Inter-Chip (HSIC) compatible PHY IP for significant power and area savings in USB 2.0 chip-to-chip connections.
  
  
• Imagination brings HD Radio Technology to its global radio platform (Monday Feb. 14, 2011)
  Imagination Technologies has extended its market leading world digital radio platform IP with support for the digital radio standard for the USA, iBiquity Digital Corporation’s HD Radio™ Technology.
  
  
• Cosmic Circuits announces portfolio of 14-bit Analog-to-Digital Converter IP-cores for Measurement and Communication Applications (Monday Feb. 14, 2011)
  Cosmic Circuits today announced its portfolio of 14 bit Analog to Digital Converters (ADC) for Measuring and Communication applications. These include a 50MSPS Analog to Digital Converter for use in radar and communication applications
  
  
• Novocell Semiconductor, Inc. to Provide OTP Solution Across Multiple IBM Foundry Semiconductor Process Nodes (Monday Feb. 14, 2011)
  Novocell Semiconductor today announces it will provide one-time programmable (OTP) memory solutions spanning fourteen different IBM Foundry Semiconductor processes. Novocell will qualify its OTP memory in the 350, 250, 180, 130, and 90nm IBM nodes.
  
  
• Synopsys' DesignWare Universal DDR Memory Controller Delivers up to 30 Percent Lower Latency and Increases System Performance (Wednesday Feb. 09, 2011)
  Synopsys today announced the release of its enhanced DesignWare® Universal DDR Memory Controller, which delivers up to 30 percent lower latency and offers up to 15 percent higher throughput than the previous generation controller. The DDR Memory Controller offers new features such as high-priority bypass and configurable 'look-ahead.'
  
  
• Cosmic Circuits tapes out Clocking Solutions in 28nm (Wednesday Feb. 09, 2011)
  Cosmic Circuits today announced the tape out of its clocking solutions in 28nm. The system-clocking PLLs are implemented in 28SLP process technology, and will offer SoC designers a wide range of analog and digital PLLs to choose.
  
  
• Silicon Image Expands Its Low-Power Camera Processor IP Core Family to Support 3D Video and Resolutions Up to 64MP (Tuesday Feb. 08, 2011)
  Silicon Image today introduced the camerIC™-3D/64MP, the newest member of its camerIC family of camera processor IP cores capable of supporting 3D and up to 8Kx8K (64 megapixel) still images and video.
  
  
• Analog Bits Unveils Industry's Lowest Power 40nm High Bandwidth SerDes (Tuesday Feb. 08, 2011)
  Analog Bits today announced the commercial availability of the industry's lowest power 40nm, high-speed Serializer/Deserializer (SerDes) IP. The breakthrough macro is programmable to support multiple protocols and small enough to be used in embedded SoCs.
  
  
• Tensilica Announces ConnX BBE64-128 - the World's Highest Performance DSP IP Core for LTE Advanced (Monday Feb. 07, 2011)
  Tensilica today extended its BaseBand Engine (BBE) family with the ConnX BBE64-128 - the next-generation architecture for DSP IP cores for SOC design. The ConnX BBE64-128 provides over 100 GigaMACs performance in 28nm high-performance process technology, easily outperforming all other DSP IP cores on the market.
  
  
• Lattice Announces Five New IP Suites for the LatticeECP3 FPGA Family (Monday Feb. 07, 2011)
  Lattice Semiconductor today announced the immediate availability of five new comprehensive Intellectual Property (IP) Suites to accelerate the design of electronic systems in a variety of industries using the award winning LatticeECP3(TM) FPGA family. These five IP suites are PCI Express, Ethernet Networking, Digital Signal Processing, Video & Display, and Value.
  
  
• Novocell Semiconductor Announces the Release of NovoBlox Nano One-Time Programmable Memory (Wednesday Feb. 02, 2011)
  Novocell Semiconductor today announces the release of NovoBlox Nano, a new, enhanced high density version of Novocell’s reliability leading NovoBlox OTP. NovoBlox Nano OTP is available in densities ranging from 8K to 256K bits.
  
  
• NSCore NVM IP "Ready for IBM Technology" (Tuesday Feb. 01, 2011)
  NSCore announced today that its PermSRAM® non-volatile memory intellectual property (IP) has been validated as “Ready for IBM Technology” for IBM's 0.18 micron CMOS foundry technology.
  
  
• Cosmic Circuits announces availability of platform for Power Management ASICs (Tuesday Feb. 01, 2011)
  Cosmic Circuits today announced the availability of platform for creating Power Management ASICs. The platform for Power management ASICs is based on silicon proven Switching regulators, linear regulators, Charge Pump, Oscillators and LED driver blocks. The Analog designs are implemented in 0.18um technology.
  
  
• ARM Expands Unmatched Real-Time Cortex Processor Portfolio for Use in Mobile Baseband, Mass Storage and Automotive Applications (Monday Jan. 31, 2011)
  ARM today announced the launch of the ARM® Cortex™-R5 MPCore™ and the Cortex-R7 MPCore processors for use in 3G and 4G mobile baseband, mass storage, automotive and industrial markets.
  
  
• Rambus Achieves Breakthroughs in Memory Signaling (Monday Jan. 31, 2011)
  Rambus today announced it has advanced differential signaling for SoC-to-memory interfaces to a groundbreaking 20 gigabits per second (Gbps) and developed innovations which can extend single-ended memory signaling to an unparalleled 12.8Gbps.
  
  
• Sofics, ICsense Merge ESD and I/O Technologies, Deliver 3.3V Signalling on Icera's 40nm, 1.8V I/O Baseband Chip (Friday Jan. 28, 2011)
  Sofics and ICsense today announced that they have partnered to create the world’s first integrated ESD and I/O design solution to allow a stable, fully protected I/O of 3.3V with 1.8V transistors in a TSMC 40nm process.
  
  
• Arasan Chip Systems offers a Complete Solution for UFS IP (Thursday Jan. 27, 2011)
  Arasan announced that it has been developing the Universal Flash Storage (UFS) IP core, a next generation memory interface being finalized by JEDEC. Arasan has engaged with its strategic lead customers to help them productize this interface.
  
  
• Synopsys' DesignWare DDR PHY Compiler Eases Integration of Memory Interface IP (Wednesday Jan. 26, 2011)
  Synopsys today announced the immediate availability of the DesignWare® DDR PHY compiler, supporting DDR2, DDR3, LPDDR and LPDDR2 SDRAMs. The DesignWare DDR PHY compiler offers designers a web-based GUI to assemble a customized, high-performance DDR PHY for their SoCs.
  
  
• CAST adds H.264 Main Profile Video Encoder Core to Compression IP Family (Wednesday Jan. 26, 2011)
  CAST, Inc. has expanded its suite of video and image compression IP with a new H.264 Main Profile Video Encoder core. The new core complements the Baseline Profile encoder CAST already offers by delivering better video compression with only a small increase in chip size.
  
  
• Palmchip Targets Smart Grid Power Management with its new AcurX51 SoC Platform and Palm8051 Core (Monday Jan. 24, 2011)
  almchip launches the AcurX51TM microcontroller SoC platform (AcurX51) for the smart grid connectivity and home area network (HAN). The energy- and cost-efficient AcurX51 is based upon a customized version of the Intel 8051 processor core together with silicon-proven peripherals targeting HAN appliances.