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IP / SOC Products News

• Impinj and TSMC Qualify AEON Memory (Monday Jun. 20, 2005)
  World’s First Multiple Time Programmable Non-volatile Memory and E² Replacement Now Available in Cost-Effective, Standard Logic CMOS Process; Adopted by Leading Chip Companies
  
  
• Jennic validates its Serial RapidIO intellectual property in silicon (Monday Jun. 20, 2005)
  Jennic has successfully demonstrated its Serial RapidIO IP operating in conjunction with solutions from other RapidIO vendors
  
  
• Photron Technologies and AccelChip Implement Unique Digital Filter Design into FPGAs for Breakthrough Wireless Communications Technology (Thursday Jun. 16, 2005)
  Next Generation Ultra Spectral Modulation Technique Achieves 25x Increase in Wireless Bandwidth
  
  
• ARM Artisan Silicon-Verified Serial Link 200 PHY Series Available On Leading 90-Nanometer Processes (Wednesday Jun. 15, 2005)
  ARM Artisan Silicon-Verified Serial Link 200 PHY Series Available On Leading 90-Nanometer Processes
  
  
• MoSys Delivers 0.13 Micron 1T-SRAM Memory Compiler (Monday Jun. 13, 2005)
  Web-based Tool Compatible with TSMC, Chartered, SMIC and UMC Processes
  
  
• MoSys Unveils Its 1T-SRAM ''CLASSIC Macro'' Family (Monday Jun. 13, 2005)
  Available on TSMC, Chartered, and SMIC 0.13micron Processes
  
  
• CAST Announces PCI Express Endpoint Controller Core (Monday Jun. 13, 2005)
  CAST, Inc. today announced a new IP core that implements an endpoint controller for PCI Express (PCIe), a fast new serial data interconnect intended for advanced and future applications
  
  
• LTRIM Converters Aim to Reduce Battery Use - High-efficiency Buck/Dual-mode IP Blocks Announced (Monday Jun. 13, 2005)
  Recognizing rising market demand for low power consumption in portable devices, LTRIM today announced two new DC-DC converter IP blocks for buck, or buck/boost chip designs
  
  
• New LTRIM Boost Converters Boast High-Efficiency - Analog IP blocks target Single and Dual battery-powered products (Monday Jun. 13, 2005)
  Taking aim at market demands for longer battery life in portable devices, LTRIM today announced a pair of high-efficiency step-up (boost) DC-DC converter IP blocks
  
  
• Spiral Gateway preps C-programmable low-power fabric (Friday Jun. 10, 2005)
  Spiral Gateway Ltd., a startup company that was spun out of the University of Edinburgh in 2004, is preparing to launch a hardware fabric design approach that the company claims can be programmed directly using the ANSI-standard version of the C software
  
  
• Avery Design and ASIC Architect Team to Deliver PCI Express IP Solution (Friday Jun. 10, 2005)
  Avery Design Systems and ASIC Architect today announced a cooperative effort to deliver a comprehensive PCI Express design and verification IP solution
  
  
• German company to introduce PLL IP core at DAC (Friday Jun. 10, 2005)
  Cologne Chip plans to introduce a new intellectual property core design at the 2005 Design Automation Conference.
  
  
• Synopsys and IBM Announce Availability of Fully Synthesizable PowerPC Cores and SystemC Models (Wednesday Jun. 08, 2005)
  Synopsys to Deliver Complete System to Implementation Solution for Power Architecture Designs
  
  
• Unique Fractional Resampling Cores from RF Engines (Tuesday Jun. 07, 2005)
  RF Engines Ltd (RFEL), the specialists in innovative signal processing design, has developed a new range of Fractional Resampling Architectures for FPGA that can be used to perform up-sampling or down-sampling of high-speed digital signals
  
  
• Denali Software and GDA Technologies Team to Deliver Comprehensive Intellectual Property Solutions for Advanced Switching Interconnect Systems (Tuesday Jun. 07, 2005)
  Design and Verification IP Products Speed Deployment of Advanced Switching Designs
  
  
• Synopsys Announces DesignWare IP Support for PCI Express 1.1 Specification (Monday Jun. 06, 2005)
  DesignWare Digital Controller Cores and PHY IP Available Today for the PCI Express 1.1 Standard
  
  
• Silicon Hive, a semiconductor IP supplier in the Philips Technology Incubator, Demonstrates World's First Fully Programmable Digital TV Demodulator IP Core (Monday Jun. 06, 2005)
  Silicon Hive IP Cores enabled the SoC to be produced in less than one year
  
  
• ARM Artisan Low Power IP Offered By IBM, Chartered To Support 65-Nanometer Common Platform (Monday Jun. 06, 2005)
  Industry’s first third-party low-power IP available for a foundry 65nm process
  
  
• Xilinx Announces Immediate Availability of Industry's First 4 Gbps Programmable Fibre Channel Solution (Monday Jun. 06, 2005)
  4G Fibre Channel Core Designed for Virtex-4 FPGAs Enables SAN Fabrics to Match Ever Increasing Server and Disk Speeds
  
  
• Rambus PCI Express PHY Passes Standard Compliance Testing; Silicon-Proven IP Achieves Five Entries on PCI-SIG Integrators List (Thursday Jun. 02, 2005)
  Silicon-Proven IP Achieves Five Entries on PCI-SIG Integrators List
  
  
• AccelChip Facilitates Sensor Array Processing with New SVD Matrix Factorization DSP IP Core (Wednesday Jun. 01, 2005)
  This new core generator makes the process of implementing sensor array processing algorithms containing SVD matrix inversion and factorization into FPGAs and ASICs much easier and will dramatically reduce development times
  
  
• HiTech Global Distribution announces Availability of the world's fastest 8051 Microcontroller IP Core with JTAG on-chip debug interface (Wednesday Jun. 01, 2005)
  Designed by Digital Core Design, and proven in multiple ASIC and FPGA designs, the DP8051 is an 8-bit ultra high performance, speed optimized controller with JTAG on-chip debug interface supporting unlimited number of real time hardware breakpoints.
  
  
• Actel Broadens Popular PCI Product Family With CorePCIF (Wednesday Jun. 01, 2005)
  Versatile Core Offers a Host of Customer-Defined Features Including Improved Application Interface
  
  
• LTRIM Unveils The LTR1803 LDO - A Programmable Output Voltage Regulator (Thursday May. 26, 2005)
  The IP, which is based on TSMC 0.25um CMOS process technology, provides designers with the utmost in flexibility as it enables them to adjust the voltage levels to 50mV increments of their initial target design
  
  
• Mentor Graphics First Vendor to Achieve PCI Express Intellectual Property Compliance on NitAl Platform (Thursday May. 26, 2005)
  This compliance enables designers to rapidly develop high-performance computing, storage and communications systems that support the PCI Express standard.
  
  
• Elliptic Semiconductor launches Digital Rights Management Security Products (Tuesday May. 24, 2005)
  Working closely with MIPS Technologies, Inc. and system-on-a-chip (SoC) designers of digital consumer devices, Elliptic has developed a complete portfolio of products that supports Microsoft Windows DRM, IPTV and the Open Mobile Alliance (OMA) 2.0 DRM sta
  
  
• Sundance Unveils One Giga Sample per Second Digital Down Converter (Tuesday May. 24, 2005)
  Specifically developed for Xilinx' FPGAs, this fully configurable core combines flexibility and speed to address the demanding performance requirements of complex DSP applications such as SDR-Software Defined Radio, Wireless IP development, hardware testi
  
  
• Initial Wave of Intellectual Property Support for New LatticeXP FPGA Family now Available (Monday May. 23, 2005)
  ispLeverCORE IP Modules, Including Ethernet, PCI, DMA, FCRAM and DDR can be Downloaded and Evaluated without Charge
  
  
• ChipMaestro from eInfochips Extends SoC Design and Verification Expertise to Computer Peripherals and Communications markets (Monday May. 23, 2005)
  New service leverages 500+ man-years of expertise in designing and verifying complex chips
  
  
• Denali Announces Dataplex IP Product for DDR, Flash, and SATA Subsystems (Monday May. 23, 2005)
  Integrated Data-Subsystem IP Leverages Databahn Technology, Addresses Quality, Performance, and Speed of Deployment