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IP / SOC Products News

• Synopsys Delivers Industry's First Processor IP Certified for Full ISO 26262 ASIL D Compliance (Wednesday Sep. 30, 2020)
  Synopsys, Inc. (Nasdaq: SNPS) today announced that the DesignWare® ARC® EM22FS Functional Safety Processor has achieved certification for full ISO 26262 automotive safety integrity level (ASIL) D compliance, meeting both random hardware fault detection and systematic functional safety development flow requirements.
  
  
• Fraunhofer IPMS develops TSN Switch IP Core (Wednesday Sep. 30, 2020)
  Time Sensitive Networking (TSN) is an extension of the IEEE 802.1 standard and aims to create reliable, deterministic and convergent Ethernet networks. The Fraunhofer IPMS now completes its TSN IP Core family with a TSN Switch IP Core and will present the innovation at the TSN/A Conference from October 7-8, 2020.
  
  
• New Arm technologies enable safety-capable computing solutions for an autonomous future (Tuesday Sep. 29, 2020)
  The new suite of IP includes the Arm® Cortex®-A78AE CPU, Arm Mali™-G78AE GPU, and Arm Mali-C71AE ISP, engineered to work together in combination with supporting software, tools and system IP to enable silicon providers and OEMs to design for autonomous workloads.
  
  
• Cadence Announces Broad IP Collaboration with GLOBALFOUNDRIES on 12LP/12LP+ Solutions (Monday Sep. 28, 2020)
  Cadencetoday announced broad IP collaboration with GLOBALFOUNDRIES® (GF®) on the 12LP platform and 12LP+ solution encompassing support for advanced memory interfaces including DDR4, DDR5, GDDR6, LPDDR4X and LPDDR5, as well as chiplet-based PHY IP and Cadence’s flagship 16G multi-protocol SerDes.
  
  
• Synopsys and GLOBALFOUNDRIES Collaborate to Develop Broad Portfolio of DesignWare IP for 12LP+ FinFET Solution (Thursday Sep. 24, 2020)
  Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with GLOBALFOUNDRIES® (GF®) to develop a broad portfolio of DesignWare® IP for GF's 12LP+ FinFET solution, including USB4/3.2/DPTX/3.0/2.0, PCIe 5.0/4.0/2.1, die-to-die HBI and 112G USR/XSR, 112G Ethernet, DDR5/4, LPDDR5/4/4X, MIPI M-PHY, Analog-to-Digital Converter, and one-time programmable (OTP) non-volatile memory (NVM) IP.
  
  
• Vidatronic Launches New 22 nm Analog IP For Ultra-Low-Power, System-On-Chip Physical Attack Mitigation In Internet Of Things (IoT) Applications (Thursday Sep. 24, 2020)
  Vidatronic today announced an addition to its low-power analog IP portfolio, the 22 nm Series for integration into application-specific integrated circuits (ASICs) and systems on a chip (SoCs).
  
  
• Allegro DVT Extends Leadership in 8K Video Decoding IP (Thursday Sep. 24, 2020)
  
  
  
• Chipus Annouces new power management IP for hearables and wearables (Thursday Sep. 24, 2020)
  In order to come up with a successful product in the growing hearables/wearable market, the user experience is the most important aspect! We, as engineers, are supposed to solve problems to create a great end-user experience. This is key to successful products and this is the first premise that Chipus used to create this IP.
  
  
• Analog Bits Announces Foundation Analog IP Availability on GLOBALFOUNDRIES 12LP FinFET Platform (Thursday Sep. 24, 2020)
  Analog Bits today announced a comprehensive library of foundation analog IP portfolio that is available on GLOBALFOUNDRIES® (GF®) 12LP FinFET platform and 12LP+ solution for artificial intelligence (AI), cloud computing, and high-end consumer system-on-chips (SoCs).
  
  
• BrainChip Confirms Validation of the Akida Neural Processor (Thursday Sep. 24, 2020)
  BrainChip Holdings Ltd (ASX: BRN), a leading provider of ultra-low power high performance AI technology, today announced that the Company has validated the Akida Neuromorphic System-on-Chip (NSoC) design with functional silicon.
  
  
• Spectral Design & Test Inc. Announces 3rd Generation 45RFSOI Low Power SRAM Targeted at the 5G Mobile Device SoC Market (Wednesday Sep. 23, 2020)
  Spectral Design & Test Inc. is announcing immediate availability of a third generation SRAM Memory Compiler in the GlobalFoundries 45 RF SOI process that substantially reduces leakage power by a factor of 35X compared to the standard memory IP in that process.
  
  
• Accelerating the next generation cloud-to-edge infrastructure (Tuesday Sep. 22, 2020)
  To accelerate the infrastructure transformation and enable new levels of innovation, Arm today is announcing two new platforms on its Neoverse product roadmap including the introduction of the Arm Neoverse V1 platform, and the addition of Neoverse N2, the second-generation N-series platform.
  
  
• Rianta Releases 400G/800G Optimized Single Channel PCS/FEC IP Core for Ethernet ASICs and SoCs (Tuesday Sep. 22, 2020)
  Rianta Solutions Inc., a leading supplier of advanced ASIC IP Cores for Ethernet, Security and Deep Learning announces RSm801™, a new 400G/800G Single Channel Ethernet PCS/FEC product addition to its IP portfolio targeting ASIC and SoC devices.
  
  
• Imagination and Packetcraft announce partnership for low energy audio (Thursday Sep. 17, 2020)
  Imagination Technologies and Packetcraft announces a partnership to enable a complete Bluetooth Low Energy audio solution using the new Low Complexity Communication Codec (LC3).
  
  
• proteanTecs Granted US Patent for High Bandwidth Memory (HBM) Signal Quality and Reliability Monitoring (Wednesday Sep. 16, 2020)
  proteanTecs, a leading developer of Deep Data solutions for electronics' health & performance monitoring, today announced that the United States Patent and Trademark Office (USPTO) has issued U.S. Patent No. 10,740,262, for Integrated Circuit I/O Integrity and Degradation Monitoring.
  
  
• Mixel Announces Availability of the World's First MIPI C-PHY/D-PHY Combo IP Supporting 30 Gbps (Tuesday Sep. 15, 2020)
  Mixel®, a leading provider of mixed-signal intellectual property (IP), announced today that its MIPI® C-PHYSM/D-PHYSM IP compliant with the MIPI C-PHY v2.0 and MIPI D-PHY v2.5 specifications is now available.
  
  
• Rambus Advances HBM2E Performance to 4.0 Gbps for AI/ML Training Applications (Thursday Sep. 10, 2020)
  Rambus today announced it has achieved a record 4 Gbps performance with the Rambus HBM2E memory interface solution consisting of a fully-integrated PHY and controller.
  
  
• CAST and Fraunhofer IPMS Introduce CAN XL Bus Controller IP Core (Tuesday Sep. 08, 2020)
  Silicon intellectual property provider CAST, Inc. and developer Fraunhofer IPMS today announced a new option for their popular CAN 2.0 and CAN FD Controller IP Core that adds support for the evolving CAN XL standard.
  
  
• Arasan Announces MIPI I3C IP Cores compliant to the MIPI I3C Specifications v1.1 (Monday Sep. 07, 2020)
  Arasan Chip Systems announces the immediate availability of its MIPI I3C HCI Host IP and I3C Device IP compliant with the latest I3C Specification v1.1 for Mobile, IoT and Automotive SoC Designs.
  
  
• Synopsys and Nestwave Collaborate to Develop a Low-Power Geolocation IP Solution for IoT Modems (Thursday Sep. 03, 2020)
  Synopsys, Inc. (Nasdaq: SNPS) and Nestwave today announced a collaboration to combine Nestwave's soft core GPS navigation IP with the Synopsys DesignWare® ARC® IoT Communications IP Subsystem for a complete low-power global navigation satellite systems (GNSS) solution for integration into IoT modems.
  
  
• Arm announces Cortex-R82: powering the future of computational storage (Thursday Sep. 03, 2020)
  Today, we’re announcing Arm Cortex-R82, our first 64-bit, Linux-capable Cortex-R processor designed to accelerate the development and deployment of next-generation enterprise and computational storage solutions.
  
  
• Blockchain Hardware Accelerator from Silex Insight is now available on AWS Marketplace (Thursday Sep. 03, 2020)
  Silex Insight, a leading provider for flexible security IP cores, announced today that their proven blockchain platform is now available on AWS Marketplace, making it easy to test and deploy. It has extreme high performance and can securely process close to 1/2 million signature verifications per second using the secp256k1 curve.
  
  
• PUFsecurity Unveils PUFiot, PUF-based Secure Crypto Coprocessor (Tuesday Sep. 01, 2020)
  PUFsecurity, a leading provider of semiconductor intellectual property (IP) for PUF-based security solutions, has launched PUFiot, a new high-security PUF-based crypto coprocessor to help chip designers easily adopt robust embedded hardware security functions.
  
  
• Mobiveil's 25xN RapidIO 4.1 compliant controller IP achives production status (Monday Aug. 31, 2020)
  Mobiveil, Inc., a fast-growing supplier of silicon intellectual property (IP), platforms and IP-enabled design services, today announced that its 25xN RapidIO® Specification 4.1 compliant digital controller is now in volume production in customer silicon.
  
  
• Flex Logix Announces nnMAX AI Inference IP In Development On GLOBALFOUNDRIES 12LP Platform (Monday Aug. 31, 2020)
  Flex Logix® Technologies, Inc., the leading supplier of embedded FPGA (eFPGA) and AI Inference IP, architecture and software, today announced that its nnMAX™ AI Inference IP is in development on GLOBALFOUNDRIES® (GF®) 12LP FinFETplatform under an agreement with the U.S. Government.
  
  
• Cadence Announces Availability of UltraLink D2D PHY IP on TSMC N7, N6 and N5 Processes (Tuesday Aug. 25, 2020)
  Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of its silicon-proven Cadence® UltraLink™ D2D PHY IP on the TSMC N7 process.
  
  
• Sofics releases Analog I/O's and ESD clamps for TSMC N5 process (Monday Aug. 24, 2020)
  Sofics bvba, a leading semiconductor integrated circuit IP provider announced that its TakeCharge® Electrostatic Discharge (ESD) portfolio is silicon proven on TSMC’s advanced 5nm process technology.
  
  
• Dolphin Design Releases its First Development Platform on TSMC 22ULL Process for Smart Home Applications (Monday Aug. 24, 2020)
  Dolphin Design, a leader in edge AI computing platforms and semiconductor IPs, today announced that the company has launched innovative design platforms that satisfy IoT application requirements. The company dedicates all the developments to serving energy efficiency and continuously pushing the boundaries of battery-operated AIoT devices.
  
  
• OpenFive Enhances Differentiated IP Portfolio with Die-to-Die Interface Controllers for HPC and Chiplet Markets (Thursday Aug. 20, 2020)
  OpenFive, the leading provider of customizable, silicon-focused solutions with differentiated IP, today announced the launch of a new Die-to-Die (D2D) interface IP portfolio to serve next-generation chiplet based designs for Networking, HPC, and AI Markets.
  
  
• CEVA's Wi-Fi 6 Solution Becomes World's First IP to Achieve Wi-Fi CERTIFIED 6 Status from the Wi-Fi Alliance (Wednesday Aug. 19, 2020)