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IP / SOC Products News
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Imagination's Ensigma UCCP330 delivers global broadcast TV demodulation plus Wi-Fi and Bluetooth (Tuesday Jan. 10, 2012)
Imagination Technologies is demonstrating in silicon its latest Ensigma UCCP Series3 IP platform, a complete, licensable solution for world TV standard demodulation plus Wi-Fi and Bluetooth connectivity, at CES 2012 in Las Vegas.
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Imagination announces first PowerVR Series6 GPU cores (Tuesday Jan. 10, 2012)
Imagination Technologies announces the first IP cores in its ground-breaking PowerVR Series6 GPU core family. The PowerVR G6200 and G6400 GPU IP cores are the first in a growing family of PowerVR Series6 GPU cores.
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Cadence Expands Proven NAND Flash Design IP Offering With ONFI 3 PHY and Controller (Monday Jan. 09, 2012)
Cadence today announced it has expanded its Flash IP offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. Cadence is the first company to provide a combined ONFI 3 controller and PHY IP solution.
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IP-Maker to deliver the first IP core compliant to the NVM Express specification (Monday Jan. 09, 2012)
IP-Maker announces the availability of the first IP core compliant to the NVM Express specification. The IP-Maker NVMe IP core is the only architecture able to sustain growing performance demand for PCIe SSD applications, enabled by non-volatile memory technology.
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Tensilica's HiFi 3 DSP IP Core Provides Over 1.5x Better Performance for Audio Post Processing and Voice in Smartphones and Home Entertainment (Monday Jan. 09, 2012)
Tensilica today announced the HiFi 3 audio/voice DSP IP core. This fourth-generation audio DSP offers higher performance with lower power for high-performance audio post-processing and voice processing algorithms used in smartphone and home entertainment systems and expands Tensilica's market-leading HiFi architecture to quad 24/32-bits.
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Alvand Technologies Analog IP Portfolio Availability in TSMC’s 28nm Process (Thursday Jan. 05, 2012)
Alvand Technologies today announced that it is offering its ADC, DAC, MIMO and Video AFE Designs in High Performance (HP) and High Performance Mobile (HPM) of Analog IP in TSMC’s 28nm process node.
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Socle Technology Develops ARM Mali Graphics Based SOC Designs Targeting 28nm Technology (Thursday Jan. 05, 2012)
Socle Technology and ARM announced today that Socle Technology has developed SoC designs using ARM® Mali™ Graphics Processing Units (GPUs) targeting GLOBALFOUNDRIES 28nm process. This is based on a new licensing agreement with ARM for multiple advanced graphics processing technologies, including the Mali-400 MP GPU.
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TranSwitch Introduces HDwire, The World's Fastest, High Definition Video Panel Interface Solution (Thursday Jan. 05, 2012)
TranSwitch today introduced its HDwire™ video interface solution. The Company’s HDwire™ video interface solution offers the industry’s fastest video interface, supporting current and next-generation, high-definition (HD) video displays.
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Cosmic Circuits announces silicon-proven PLL portfolio (Wednesday Jan. 04, 2012)
Cosmic Circuits today announced the silicon availability of PLLs in multiple process technologies. The system-clocking PLLs are implemented in 55 and 40nm process technology.
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CEVA Announces Availability of CEVA-MM3101, a Programmable, Low Power Imaging and Vision Platform for Camera-Enabled Devices (Wednesday Jan. 04, 2012)
CEVA today announced the availability of the first imaging and vision platform based on its CEVA-MM3000™ architecture framework. The CEVA-MM3101 platform integrates video and imaging functions that today are distributed among multiple processor engines, to address the image and video pipeline, image enhancement, embedded vision applications and image encoding functions
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Moortec Extend Temperature Sensor IP Offering to Global Foundries 28nm (Wednesday Jan. 04, 2012)
Moortec Semiconductor are to extend their embedded temperature sensor IP range to GlobalFoundries' 28nm technology. The IP, which is already available on TSMC's standard 65nm, 40nm and 28nm CMOS technologies, is typically applied for ASIC performance optimization, thermal management, device reliability, temperature sensing during device qualification (or burn-in) and device security.
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Elecard SATA Controller IP Core hits the market (Monday Jan. 02, 2012)
Elecard announces release of Elecard SATA Controller IP Core for communication between FPGA systems and external devices via SATA inteface.
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Xylon's logiSDHC SD Card Controller IP core now includes the File System (Tuesday Dec. 20, 2011)
Xylon's logiSDHC SD Host Controller IP core package now includes the FatFs generic FAT file system to enable faster and easier integration of SD card mass storage devices in Xilinx® FPGA based embedded systems
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Microsemi and INVIA First to Deliver DPA-resistant Cryptographic Software on SmartFusion (Monday Dec. 19, 2011)
Microsemi today announced the immediate availability of INVIA's differential power analysis (DPA)-resistant products on Microsemi's flash-based FPGA devices and SmartFusion®, the industry's only customizable system-on-chip (cSoC) solution which integrates an FPGA with analog functions and a hard ARM microcontroller core.
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ECC Tek Announces Ultra-High-Performance Binary BCH Encoders and Decoders (Monday Dec. 19, 2011)
ECC Technologies announces the immediate availability of ultra-high-performance binary BCH encoders and decoders for correcting large numbers of random errors in MLC NAND Flash memories.
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Dolphin Integration unveils an sRAM architecture for Cost Sensitive Devices at 90 nm LP (Friday Dec. 16, 2011)
Dolphin Integration is releasing RHEA, the latest innovation of the sRAM family, for cost sensitive SoCs at 90 nm and 85 nm TSMC technological processes.
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Alvand Technologies announces availability of next-generation Compact Video DAC in 40 nm (Thursday Dec. 15, 2011)
Alvand Video DACs support conversion rates from 20 to 300 Msps, with 10-bit /12-bit resolution and robust immunity to substrate noise.
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CAST Full Hardware UDP/IP Stack Core Simplifies Streaming Media Over IP Networks (Thursday Dec. 15, 2011)
A new core from semiconductor intellectual property (IP) provider CAST, Inc. the UDPIP, provides an extremely competitive hardware implementation of the User Datagram Protocol (UDP), part of the Internet Protocol Suite (TCP/IP) for data transfer over Ethernet.
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GLOBALFOUNDRIES and ARM Deliver Optimized SoC Solution based on ARM Cortex-A Series Processors (Thursday Dec. 15, 2011)
GLOBALFOUNDRIES and ARM today revealed the latest advances in their longstanding collaboration to deliver optimized system-on-chip (SoC) solutions for ARM® Cortex™-A series processor designs using ARM Artisan® advanced physical IP and GLOBALFOUNDRIES’ leading-edge process technologies.
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Renesas Electronics Develops Industry's First 40nm Embedded Flash Memory Technology IP for Automotive Real-Time Applications (Wednesday Dec. 14, 2011)
Renesas Electronics today announced that it has developed the industry's first 40-nm memory IP for automotive real-time applications. Renesas will also be the first to launch 40nm embedded flash microcontrollers (MCUs) for automotive applications using this 40nm flash technology with samples available by the beginning of autumn 2012.
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InnoRoute announces the availability of its FlowEngine packet flow processor family (Monday Dec. 12, 2011)
InnoRoute today announced the availability of the IR-FExG Flow Engine product family. The InnoRoute FlowEngine IR-FExG is an Ethernet packet processor core element that is used to extend the functionality of a standard layer-2 Ethernet switch to provide G.999.1 connectivity over Gigabit-Ethernet interfaces, ATM AAL5 segmentation and reassembly for legacy ADSL operation and a highly innovative QoS functionality based on InnoRoute FlowShaper architecture.
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Dolphin Integration announces the availability at 40 nm of low-power audio codec with SNR of 100 dB (Friday Dec. 09, 2011)
The audio converter panoply from Dolphin Integration is based on ultra Low Power architecture of cores - ADC and DAC - and offers peripherals for high density or low BoM to address mobile devices like smart phones, tablets, DSC, portable DVD players…
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Arasan Chip Systems Announces 3rd Generation Hardware Validation Platform Family for Mobile Interface Standards (Friday Dec. 09, 2011)
Customers adopting emerging and existing protocols like MIPI’s Unipro, CSI-2 and DSI, JEDEC’s UFS and SDA’s SD4.0 can now leverage Arasan’s platforms to jump start and speed up their pre-silicon, silicon and system validation and applications development
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Arteris Collaborates on Interposer Test Chip Projects With TSMC (Tuesday Dec. 06, 2011)
Arteris today announced that it is collaborating with TSMC by incorporating Arteris' FlexNoC Network-on-Chip (NoC) interconnect IP into an SoC die on silicon interposer test chip.
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Analog Bits Announces 28nm IP Availability (Tuesday Nov. 29, 2011)
Analog Bits revealed for the first time that it has long had working silicon at the 32nm process nodes, and has delivered numerous 28nm IP based on a high performance (HP) and low power (LP) processes. It is now actively porting production-proven IP to multiple 28nm nodes, including the new 28nm HPM process.
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Global Unichip's USB 3.0 Device Controller IP Passes USB-IF Test Procedure for SuperSpeed Products (Tuesday Nov. 29, 2011)
Global Unichip Corp. (GUC), the Flexible ASIC Leader™, today announced that its USB 3.0 Device Controller IP has passed the USB-IF Test Procedure for SuperSpeed products and is now listed in the Integrator List.
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Proven on silicon: A Panoply of Memories and Standard Cells of Dolphin Integration to divide dynamic power by 5 at 180 nm! (Monday Nov. 28, 2011)
With the release of its latest 180 nm Panoply of standard cells and memories, Dolphin Integration paves the way for a new generation of ultra low power SoCs in mature processes.
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DMAP Announces Development of DO-254 DAL A Complex Semiconductor IP, Fully Verified with Mentor Graphics Questa® Functional Verification Platform (Monday Nov. 28, 2011)
DMAP has made available to the market PCI Express and Ethernet (Gigabit, 10G) IP for DO-254 applications that has been verified using SystemVerilog and Assertion Based Verification (ABV) in an OVM environment.
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Digital Core Design Announces the World's fastest 8051 CPU (Thursday Nov. 24, 2011)
Digital Core Design, a leading IP Core provider and System-on-Chip (SoC) design house from Poland, introduced the newest 8051 implementation, which is significantly much more efficient than any other solution available.
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DCD introduces IP Core for the Controller Area Network (Monday Nov. 21, 2011)
The DCAN is a standalone controller for the Controller Area Network (CAN), which is common used in automotive and industrial applications. What's the most important, DCAN conforms to Bosch CAN 2.0B specification (2.0B Active). The Core has simple CPU interface (8/16/32 bit configurable data width), with little or big endian addressing scheme. The DCAN supports both standard (11 bit identifier) and extended (29 bit identifier) frames.








