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IP / SOC Products News

• Imagination Technologies Launches Programmable Shader Graphics Family for Wireless Applications (Friday Jul. 29, 2005)
  Debut Of PowerVR SGX Wireless Graphics Accelerator Core Family Enables Industry Roadmap For Next Generation Mobile Devices
  
  
• ASIC Architect's Endpoint Controller for PCI Express Successfully Passed PCI-SIG Compliance and Added to the Integrators List (Friday Jul. 29, 2005)
  ASIC Architect brings industry standard solution for PCI Express
  
  
• AccelChip Offers Linear Algebra Cores through Xilinxs Alliance Program (Wednesday Jul. 27, 2005)
  AccelChips matrix inverse and factorization cores are being offered through Xilinxs third-party Alliance Program. The Alliance Program, which includes independent core developers, is designed to produce a broad selection of industry-standard solutions de
  
  
• Falanx Mali 110/55 IP Cores First to Support Latest OpenGL ES 1.1 Standard (Wednesday Jul. 27, 2005)
  Falanx Continues to Lead Effort for Graphics Standardization in Mobile Devices
  
  
• Tallika announces immediate availability of High Speed Security Cores (Monday Jul. 25, 2005)
  The Company also disclosed that its solutions have been proven on FPGA platforms and have been licensed to a large semiconductor vendor for integration into a high-end ASSP product for imminent tapeout in 0.13u technology
  
  
• Lattice Releases Open IP Core Soft Microcontroller (Monday Jul. 25, 2005)
  Open IP Core License for Microcontroller, an Industry First from an FPGA Vendor, Will Encourage User Development and Contributions
  
  
• Mentor Graphics Receives Industry Certification of ULPI Support for USB On-The-Go IP Core (Thursday Jul. 21, 2005)
  Most UTMI + PHY require between 40-60 pins from the USB IP controller, but this solution reduces the number of pins down to 12 when using an off-chip or discrete PHY, resulting in a lower cost solution
  
  
• Virage Logic Extends Lead With 65nm Semiconductor IP (Thursday Jul. 21, 2005)
  Building on Their Success at 130nm and 90nm, Long-Standing Customer Freescale and Foundry Partner UMC Select Virage Logic for 65nm
  
  
• TransDimension Achieves ULPI Controller IP Certification at Industry's First High-Speed OTG Compliance Workshop (Wednesday Jul. 20, 2005)
  Certification Ensures Lower Risk for Customers Integrating High-Speed USB into System-on-Chip Solutions
  
  
• Silicon Interfaces Announces USB On-The-Go (OTG) Intellectual Property (Wednesday Jul. 20, 2005)
  It is a single core solution incorporating USB-OTG operating in Link Layer of Open System Interconnect (OSI) which significantly reduces the time and cost of implementing complex USBOTG target system designs
  
  
• Falanx Microsystems Announces Video-Optimized IP Cores for Handheld Semiconductor Design (Tuesday Jul. 19, 2005)
  Mali Video Series IP Cores Provide Superior Video Quality, H.264 Encode/Decode and a Simple Upgrade to 2D/3D Graphics
  
  
• Onyx Announces RF and Power Management IP Blocks in Jazz Semiconductor RFCMOS Process (Tuesday Jul. 19, 2005)
  The OY5100 and OY6100 IP blocks have been taped-out in the Jazz CA18HR RFCMOS process and engineering samples will be available in the fourth quarter
  
  
• Eureka Technology Successfully Validated and Demonstrated PCI Express Controller IP Core (Friday Jul. 15, 2005)
  Eureka’s PCI Express Controller Core is designed for both ASIC and FPGA implementations. The Controller Core includes the Transaction Layer, Data Link Layer and Physical Layer of the PCI Express Specification. It conforms to the latest 1.0a revision and i
  
  
• ARM Demonstrates Highest Performance ARM11 Family Processor (Wednesday Jul. 13, 2005)
  ARM has recently demonstrated the first test chip of its ARM11™ MPCore™ synthesizable processor which has demonstrated performance equivalent to a 1.2GHz ARM11 family processor, with power consumption of approximately 600mW while delivering 1440 DMIPS of
  
  
• Arasan Releases SDIO Spec Ver 1.20 Compliant SDIO Device IP (Wednesday Jul. 13, 2005)
  The new IP supports 50 MHz giving it a maximum throughput of 200Mbps in SD-4 bit mode. It also supports extended voltage range of 1.8V which makes it suitable for Cellular/Smart phone applications
  
  
• CHIPIDEA Announces Silicon Validation of a Very Compact 90nm 10-bit /105MHz ADC (Tuesday Jul. 12, 2005)
  CHIPIDEA, listed by Gartner Inc. as the world leading Analog and Mixed-Signal IP player, announces silicon validation of the CI3514hm, a very compact 90nm 10-bit/105MHz ADC, with very low power dissipation and power-down modes for standby operation
  
  
• RF Engines releases a library of high performance FFT Cores for FPGA (Monday Jul. 11, 2005)
  RF Engines' library provides FPGA designers with a source of highly optimised high-speed FFT cores that can be quickly and cost-effectively integrated into a design.
  
  
• TELEVISION IP: Programmable core boosts processing On Demand (Monday Jul. 11, 2005)
  Intellectual-property licensing company On Demand Microelectronics GmbH is quietly making inroads into the digital TV market by leveraging the programmability of its synthesizable core
  
  
• Rambus Unveils Next Generation XDR Memory Interface (Thursday Jul. 07, 2005)
  8GHz XDR2 DRAM with micro-threading enables unprecedented graphics capabilities
  
  
• CHIPIDEA announces a new HDTV AFE product line (Wednesday Jul. 06, 2005)
  These new state-of-the-art IP cores handle most HDTV modes and also PC-Graphics applications
  
  
• Rambus PCI Express PHY IP on Fujitsu 90nm CMOS Process (Tuesday Jul. 05, 2005)
  Compliance and interoperability tested, silicon proven PHYs extend to multiple applications
  
  
• Imagination Technologies' PowerVR MBX Supports Windows Mobile 5.0 (Tuesday Jun. 28, 2005)
  Leading Graphics and Video IP Technology is Enabling Leap Forward in Mobile Entertainment
  
  
• MorethanIP releases new 10 Gigabit Ethernet Base-X PCS Core for XGXS/XAUI implementations. (Monday Jun. 27, 2005)
  MorethanIP releases new 10 Gigabit Ethernet Base-X PCS Core for XGXS/XAUI implementations.
  
  
• ASICS.ws achieves USB 2.0 HS-OTG Certification (Monday Jun. 27, 2005)
  ASICS World Services, Ltd. is proud to announce that it is one of the first companies in the world to achieve USB 2.0 HS-OTG Compliance Certification
  
  
• Faraday Expands Into High-performance Application ICs with its Hard Core CPU Technology (Monday Jun. 27, 2005)
  FA5 and FA6 CPU Cores Enable the Next Generation SoC Solutions at UMC 0.18µm and 0.13µm CMOS Technologies
  
  
• CEVA Brings a High Performance, Low-Power Audio Platform to Consumer Devices (Monday Jun. 27, 2005)
  CEVA-Audio™ - an Integrated Hardware and Software DSP-based Solution - Delivers a Low-Power, Low-Cost Platform with Easy Design Integration
  
  
• Denali and TaraCom Announce Comprehensive Solutions for 3.0 Gb/s SATA (Thursday Jun. 23, 2005)
  IP Vendors Team to Deliver Digital Controller IP, PHY IP, and Verification IP
  
  
• All-silicon Copernicus Clock generates 528MHz clock signal with no external components (Thursday Jun. 23, 2005)
  CMOS clock generator creates a stable high frequency clock signal with minimal power dissipation, remains operational over an extreme temperature range, and does not require external components.
  
  
• Silicon Hive announces two new Avispa processors (Wednesday Jun. 22, 2005)
  Silicon Hive has announced two new cores in the award-winning Avispa family.
  
  
• POWER MANAGEMENT: Converters move on-chip to regulate SoC's voltage (Monday Jun. 20, 2005)
  While most of the attention in system-on-chip design remains focused on digital issues-IP selection, interconnect architecture, memory generation and the like-yet another kind of integration problem is quietly creeping up on designers, especially in compa